products structure: silicon hybrid integrat ed circuit this product has no designed protection against radioactive rays. 1/ 24 tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 14 ? 001 tsz22111 ? 14 ? 001 high speed digital isolator 2500 vrms 2ch BM67220FV-C general description the BM67220FV-C is a high-speed isolator ic used in electric vehicles and hybrid vehicles. this ic features dielectric strength of 2500 vrms between i/o. maximum propagation delay time is 45 ns. features 1. dielectric strength of 2500 vrms between i/o 2. maximum propagation delay time of 45 ns 3. built-in 2ch uni-directional propagation 4. aec -q100 qualified 5. ul 1577 recognized:file no. e356010 applications propagation of logic signal within electric and hybrid vehicles key specification ? supply voltage range: 4.5v to 5.5v ? propagation delay: 45ns (max) ? stand-by current: 0a (typ) ? operating temperature range: -40c to +125c package w(typ) x d(typ) x h(max) typical application circu it figure 1 . bm67220 fv -c application example * please connect bypass capacitor directly to the ic pin. gnd2 out1 out2 9 gnd1 20 6 in1 15 in2 16 5 s r q pulse generator pulse generator vcc1 4 vcc2 17 11 2 uvlo uvlo 8 ten1 13 ten2 s r q pulse generator pulse generator en1 7 en2 14 lvg. hvg. hvg. lvg. * * ss op -b20w 6.50mm x 8.10mm x 2.01 mm datashee t downloaded from: http:///
2/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 pin configuration figure 2. bm67220 fv -c package (ssop-b20w) pin description no. pin name function no. pin name function 1 nc no connection 20 gnd2 ground 2 2 gnd1 ground 1 19 nc no connection 3 nc no connection 18 nc no connection 4 vcc1 power supply 1 17 vcc2 power supply 2 5 in 2 input 2 16 out2 output 2 6 in1 input 1 15 out1 output 1 7 en1 enable input 1 14 en2 enable input 2 8 ten1 test mode input 1 13 ten2 test mode input 2 9 gnd1 ground 1 12 nc no connection 10 nc no connection 11 gnd2 ground 2 nc gnd1 nc vcc1 in2 in1 en1 ten1 gnd1 nc gnd2 nc nc vcc2 out2 out1 en2 ten2 nc gnd2 downloaded from: http:///
3/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 description of operation 1. input/output logic the input/output logic levels for the bm67220 fv -c are as shown in the table below. no. en1 en2 in1 in2 out1 out2 1 l l x x l l 2 l h l l * * 3 l h * * 4 h l * * 5 h h * * 6 h l l l l l 7 l h l l 8 h l l l 9 h h l l 10 h h l l l l 11 l h l h 12 h l h l 13 h h h h * retains its previous state in case en1 and en2 pins are "l" as in no. 1, the logic of out1 pin an d out2 pin becomes "l". in case en1 pin is "l" and en2 pin is "h" as in no. 2 ~ 5, the logic of out1 pin and out2 pin will retain its previous st ate. in case en2 pin is "l" and en1 pin is "h" as in no. 6 ~ 9, the logic of o ut1 pin and out2 pin becomes "l". in case en1 and en2 pins are "h" as in no. 10 ~ 13, the output lo gic of out1 (out2) pin changes according to the input logic of in1 (in2) pins. likewise, since pull up/pull down resistor has not been c onnected to in1, in2, en1 and en2 pins, it is necessary to connect external resistor in case you would like to fix the input l ogic of in1, in2, en1 and en2 pins. 2. ten pins the ten pins serve as a test enable pin, respectively. please connect to gnd to avoid the possibility of chip malfu nction. 3. output pin voltage logic levels for output pins are indicated in the truth ta ble in sections 1, 6, and 7. however, it may be assumed that such logic levels disable the output circuit to fully turn on at a low voltage when turning on or off the power supp ly, thus putting the output pin into the high impedance state. 4. under voltage lock out (uvlo) function this ic has a built- in uvlo function to prevent the ic from malfunctioning whenever the pow er supply voltage drops. it triggers the uvlo state when vcc1 pin and vcc2 pin are changed to 3.8v (typ) or less and becomes in operational state when changed to 4.0v (typ) or more. if vcc1 drops to 3.8v or less, both out1 and out2 pins retain its state. if vc c2 drops to 3.8v or less, both out1 and out2 pins will be set to l logic level. in case vcc2 pin voltage was changed from 3.8v (typ) or less to 4.0v (typ) or more at 4.0v (typ) or more for vcc1 pin voltage, the output logic of out1 pin and out2 pin becomes "l". in case vcc1 pin voltage was changed from 3.8v (typ) or less to 4.0v (typ) or more at 4.0v (typ) or more for vcc2 pin voltage, the output logic of out1 (out2) pin changes according to the input logic of input in1 (in2) pin. 5. under voltage lock out (uvlo) function masking time this ic provides masking time for the uvlo function. the masking time is set to 10 sec (typ). downloaded from: http:///
4/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 6. input/output logic levels with power supply turned off the following table shows the output logic levels accordin g to the order in which the power supply turns off. no. power supply in1 in2 out1 out2 1 vcc1 l l l l 2 l h l h 3 h l h l 4 h h h h 5 vcc2 l l l l 6 l h l l 7 h l l l 8 h h l l the output logic of out1 pin and out2 pin is in a maintained state in case vcc1 is turned off as in no. 1 ~ 4. the output logic of out1 pin and out2 pin is l in case vcc2 is turned off as in no. 5 ~ 8 . 7. output logic levels with power supply turned on the following table shows the output logic levels accordin g to the order in which the power supply turns on. no. turning- on order1 turning- on order2 in1 in2 out1 out2 1 vcc1 vcc2 l l l l 2 l h l l* 3 h l l* l 4 h h l* l* 5 vcc2 vcc1 l l l l 6 l h l h 7 h l h l 8 h h h h *different input and output logic in case vcc1 is turned on first as in no. 1 ~ 4, a signal from vcc1 side to the circuit of vcc2 side cannot be received because of the cancellation by the signal before the circu it of vcc2 (receiving) side rises. for that reason, the output logic of out1 pin and out2 pin bec ome "l" and the output logic does not match with the input logic as in no. 2, 3, 4*. downloaded from: http:///
5/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 timing chart figure 3. vcc1 to vcc2 (in1=l, in2=l) figure 4. vcc1 to vcc2 (in1=h, in2=h) vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off uvlo on input inhibition area max. 500 s input inhibition area max. 500 s vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off u vlo on input inhibition area max. 500 s input inhibition area max. 500 s mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) downloaded from: http:///
6/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 timing chart - continued figure 5. vcc1 to vcc2 (in1=l to h, in2=l to h) figure 6. vcc1 to vcc2 (in1=h to l, in2=h to l) vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off u vlo on input inhibition area max. 500 s ) input inhibition area max. 500 s mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off u vlo on input inhibition area max. 500 s input inhibition area max. 500 s downloaded from: http:///
7/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 timing chart - continued figure 7. vcc2 to vcc1 (in1=l, in2=l) figure 8. vcc2 to vcc1 (in1=h, in2=h) vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off u vlo on input inhibition area max. 500 s input inhibition area max. 500 s vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off u vlo on input inhibition area max. 500 s input inhibition area max. 500 s mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) mask time ( typ. 10 s ) downloaded from: http:///
8/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 timing chart - continued figure 9. vcc2 to vcc1 (in1=l to h, in2=l to h) figure 10. vcc2 to vcc1 (in1=h to l, in2=h to l) vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off u vlo on input inhibition area max. 500 s input inhibition area max. 500 s mask time ( typ. 10 s ) mask time ( typ. 10 s ) vcc1 vcc2 en1 en2 in1 in2 out1 out2 uvlo off u vlo on uvlo off u vlo on input inhibition area max. 500 s input inhibition area max. 500 s mask time ( typ. 10 s ) mask time ( typ. 10 s ) downloaded from: http:///
9/ 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 absolute maximum ratings parameter symbol rating unit BM67220FV-C power supply voltage 1 v cc1 7.0 (note 1) v power supply voltage 2 v cc2 7.0 (note 2) v in1 pin voltage v in1 -0.3 to +7.0 (note 1) v in2 pin voltage v in2 -0.3 to +7.0 (note 1) v out1 pin voltage v out1 -0.3 to +7.0 (note 2) v out2 pin voltage v out2 -0.3 to +7.0 (note 2) v output current i omax(out) 10 (note 3) ma gnd1-gnd2 ground potential v gnd 2500 vrms operating temperature range t opr -40 to +125 c storage temperature range tstg -55 to +150 c power dissipation pd 1.19 (note 4) w maximum junction temperature tjmax 150 c (note 1 ) re ference to gnd1. (note 2) re ference to gnd2. (note 3) should not exceed pd and aso. (note 4) derate by 9.52mw/c when operating above ta=25c , when mounted on a glass epoxy board measuring 70 mm ? 70 mm ? 1.6 mm (including a copper foil area of 3% or less). caution: operating the ic over the absolute maximum ratings may damage the ic. in addition, it is impossible to predict all destructive situations such as short-circuit modes, open circuit modes, etc. therefore, it is important t o consider circuit protection measures, like adding a fuse, in case the ic is operated in a special mode exceeding the absolute maximum ratings recommended operating conditions parameter symbol BM67220FV-C unit power supply voltage 1 v cc1 4.5 to 5.5 (note 5) v power supply voltage 2 v cc2 4.5 to 5.5 (note 6) v (note 5 ) relative to gnd1 (note 6) relative to gnd2 insulation related characteristics parameter symbol characteristic unit insulation resistance (v io =500v) r s >10 9 insulation withstand voltage/1min v iso 2500 vrms insulation test voltage/1s v iso 3000 vrms ul1577 ratings table following values are described in ul report. parameter values units conditions side 1 circuit current 0.21 ma vcc1=5v side 2 circuit current 0.21 ma vcc2=5v side 1 consumption power 1.05 mw vcc1=5v side 2 consumption power 1.05 mw vcc2=5v isolation voltage 2500 vrms maximum operating (ambient) temperature 125 maximum junction temperature 150 maximum strage temperature 150 maximum data transmission rate 20 mhz downloaded from: http:///
10 / 24 BM67220FV-C tsz02201-0 72 7a bg 00010-1-2 ? 2012 rohm co., ltd. all rights reserved. 25.dec.2015 rev.005 http://www.rohm.co.jp tsz22111 ? 15 ? 001 electrical characteristics (all values at ta ? - 40 ? c to125 ? c and vcc ? 4.5v to 5.5v, unless otherwise specified) parameter symbol limit unit conditions min typ max vcc1 power supply current, quiescent i cc1stby - 0 10 a en1 = 0 vcc2 power supply current, quiescent i cc2stby - 0 10 a en2 = 0 vcc1 power supply current, dc i cc1q - 0.21 0.42 ma v in = 0 or v cc vcc2 power supply current, dc i cc2q - 0.21 0.42 ma v in = 0 or v cc vcc1 power supply current, 10kbps i cc10k1 - 0.23 0.50 ma f in : 5khz vcc2 power supply current, 10kbps i cc10k2 - 0.22 0.48 ma f in : 5khz vcc1 power supply current, 1mbps i cc1m1 - 1.36 3.20 ma f in : 500khz vcc2 power supply current, 1mbps i cc1m2 - 0.40 1.00 ma fin : 500khz in1,in2 input inhibition area t in - - 500 (note 7) s
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